TSMC Unveils Latest Technological Advancements at North America Technology Symposium to Meet Diverse Customer Needs

Taiwan Semiconductor Manufacturing Company (TSMC), the world's leading semiconductor foundry, held its 2023 North America Technology Forum on April 26 (US Pacific Time) to reveal its latest technology developments. It may be interested to know that TSMC unveiled its 2-nanometer technology progress and new members of its industry-leading 3-nanometer technology family, aimed at providing a wide range of technology combinations to meet customers' diverse needs.

TSMC President Wei Zhejia stated that customers are always seeking new ways to leverage the power of chips to bring amazing innovations to the world and create a better future. With the same spirit, TSMC is continuously growing and advancing, enhancing and promoting its process technology to improve efficiency, power consumption, and functionality, and helping customers release more innovation in the future.

TSMC has already entered mass production with its 3-nanometer N3 process, and plans to start mass production with its enhanced N3E process in 2023. TSMC is also introducing more members of the 3-nanometer technology family to meet customers' diverse needs, including the N3P process, which is expected to enter mass production in the second half of 2024. Compared to N3E, N3P can increase speed by 5% under the same leakage, reduce power consumption by 5-10% at the same speed, and increase chip density by 4%.

The N3X process focuses on efficiency and maximum clock frequency to support high-performance computing (HPC) applications. Compared to N3P, N3X can increase speed by 5% under a driving voltage of 1.2 volts and has the same chip density improvement. TSMC plans to start mass production with N3X in 2025. N3AE will provide a design kit (PDK) based on N3E for automotive processes, enabling customers to adopt 3-nanometer technology early to design automotive application products, making it easier to adopt the fully validated N3A process in 2025.

TSMC also announced good progress in the development of its 2-nanometer technology, which uses a nanosheet transistor architecture. It is expected to enter mass production in 2025, exhibiting good progress in yield and device efficiency. Compared to the N3E process, it can increase speed by up to 15% at the same power consumption and reduce power consumption by up to 30% at the same speed, with chip density increasing by more than 15%.

TSMC has also made the latest capacity announcement for CMOS radio-frequency (RF) technology, following the launch of its N6RF RF process technology in 2021. TSMC has further developed the N4PRF process, the most advanced CMOS RF technology in the industry, to support digital-intensive RF applications such as WiFi 7 RF system-on-chip. Compared to the previous generation process, the logic density has increased by 77%, and power consumption has been reduced by 45% at the same speed.