TSMC Unveils Next-Gen Semiconductor Roadmap with CFET Technology

According to foreign media AnandTech, TSMC showcased the roadmap for its next-generation semiconductor architecture during the 2023 European Technology Symposium. The most advanced field-effect transistor (FET) architecture presented was CFET. TSMC officials stated that the technology has been under research in the laboratory and has made some progress, but it will still take a considerable amount of time before it can be implemented on a large scale. The roadmap also featured two-dimensional transistors and carbon nanotube technology; however, these technologies are considered to be distant in terms of practical applications.

Previously reported by EETimes, Intel also revealed its semiconductor process roadmap, demonstrating a similar stacked CFET architecture that can be utilized in sub-1nm processes.

Currently, the commercially available advanced semiconductor technology is based on the FinFET field-effect transistor architecture. According to the roadmap, the next generation will adopt the GAAFET (Gate-All-Around FET) with a nanosheet structure, suitable for sub-3nm processes. TSMC stated that the upcoming 2nm N2 process node will employ the GAAFET structure.

The more advanced CFET field-effect transistor architecture involves the stacking of n-type and p-type MOS devices, allowing for the vertical stacking of up to eight nanosheets. This structure is similar to Intel's previously announced CFET structure and represents the direction of development for the future of cutting-edge semiconductor manufacturing.

Kevin Zhang, Senior Vice President of TSMC, mentioned that the company is researching various technical solutions and considering different architectures. However, at this stage, it is difficult to determine which architecture will outperform GAAFET. He stated, "Considering FinFET technology has been in use for five years, it is likely that the next-generation GAAFET will also be utilized for several years, developing through multiple generations. As for CFET, it will take even longer to achieve mass production and application."

Although the technology roadmap provides a clear development direction, it is important to note that smaller structures require further improvement in the precision of lithography machines. Only ASML's next-generation High-NAEUV lithography machine can achieve this. According to previous reports, ASML's High-NAEUV lithography machine is currently in the research and manufacturing process, and TSMC is expected to be the first to obtain the High-NA EUV lithography machine in 2024 for the production of 2nm GAAFET architecture chips.