Intel's Glass-Based Chip Substrates: Enhancing Packaging Efficiency

Intel, a leading technology company, is working on developing chip substrates made of glass, according to a report by EE Times. This innovative approach aims to overcome the challenges associated with using organic material substrates for chip packaging. Pooya Tadayon, Intel's Assembly and Test Director, explains that glass offers superior hardness and has a lower coefficient of thermal expansion compared to organic materials. These properties make glass substrates highly advantageous, enabling closer interconnect spacing and making them suitable for large-sized packaging.

Using glass materials brings several interesting benefits. It can enhance chip power efficiency and significantly increase interconnect bandwidth from 224G to 448G. As manufacturing processes evolve and demands change, glass substrates are expected to gradually coexist with organic material substrates rather than replacing them.

Tom Rucker, Intel's Vice President of Technology Development and Test Development, highlights the company's transition from System-on-Chip (SoC) to system-in-package wafer-level packaging. This ongoing shift already incorporates Embedded Multi-Die Interconnect Bridge (EMIB) technology, with further progress toward 3D interconnects and chip stacking. These advancements provide higher performance within a given space.

However, large-sized packaging poses mechanical challenges. Intel acknowledges that such substrates tend to warp, complicating their assembly onto motherboards. To address this, Intel plans to collaborate with circuit board assembly companies and explore advanced packaging technologies that can better assist their customers.

Intel anticipates the production of chips with glass substrates by the end of 2024 at the earliest. Over time, the interconnect spacing is expected to decrease further, supporting 3D stacking. This packaging technology can significantly improve yield rates, as current packaging methods for large data center GPUs and accelerators involve small chips, with up to 50 chips per substrate. If any chip in the batch is defective, the entire substrate must be discarded.