AMD Versal Premium VP1902: Accelerating Chip Design

Advanced Micro Devices (AMD) has unveiled its latest product, the Versal Premium VP1902. This programmable logic gate array (FPGA) series is touted as the world's largest adaptive system-on-chip (SoC), measuring 77x77 square millimeters and featuring an impressive 18.5 million logic units. The VP1902 aims to help chip enterprises streamline their chip design processes.

According to reports from Fierce Electronics and The Register, Rob Bauer, Senior Product Manager for AMD's Versal product line, highlighted the increasing complexity of chip design as the semiconductor industry adopts advanced packaging technologies like 2.5D and 3D chiplet architectures. Chip designers are no longer focused on validating and developing software for individual bare chips; they now face the challenge of configuring devices with multiple bare chips and utilizing small chiplet architectures.

The Versal Premium VP1902 addresses these challenges head-on. By expediting the verification process and conducting thorough testing before chip products reach the tape-out stage, the risk of errors and the need for redesigns can be significantly minimized.

The VP1902 leverages FPGA technology to create a digital twin of a chip, enabling accelerated verification through emulation and prototyping. This empowers developers to advance software development and other critical tasks earlier in the overall chip design cycle, long before the chip design is finalized.

To enhance the VP1902's capabilities, AMD collaborated closely with leading electronic design automation (EDA) companies such as Cadence, Siemens, and Synopsys. Initial customer samples of the VP1902 are expected to be available in Q3 2023, with mass production commencing in early 2024. While the primary target customers are chip enterprises, AMD emphasizes that this product is also well-suited for firmware development and testing, IP block and subsystem prototyping, peripheral device verification, and other testing applications.

Featuring a small chiplet architecture with four interconnected chiplets, the VP1902 boasts 18.5 million logic units. It incorporates dedicated ARM cores for control plane operations and on-board networking capabilities, facilitating chip debugging. This innovative design approach optimizes FPGA logic utilization by integrating general-purpose computing and network functions, reducing the logic required for I/O, debugging, and control plane operations. As a result, more logic units can be allocated to chip simulation tasks.