Intel-Synopsys IP Collaboration: Boosting Semiconductor Innovation

Intel, a major processor manufacturer, and Synopsys, an EDA company, have announced a significant agreement to enhance their collaboration in Intellectual Property (IP) and Electronic Design Automation (EDA) strategies. This partnership aims to create a range of cutting-edge IPs based on Intel 3 and Intel 18A for use by Intel's foundry customers, bringing stronger product offerings to both new and existing clients of Intel Foundry Services (IFS).

As part of this collaboration, Synopsys will integrate its suite of standardized interface IP products with Intel's advanced processing technology. This move will provide Intel's foundry customers with access to industry-leading IPs built on advanced Intel process technology, facilitating quicker design execution and project timelines for System-on-Chip (SoC) development.

Building on their long-standing relationship, this multi-generation IP agreement combines Synopsys' AI-driven EDA suite with Intel's expertise to streamline design workflows. Synopsys will leverage its advanced design tools and implementation processes to optimize power, performance, and area aspects for SoC and multi-chip system designs using Intel 3 and Intel 18A process technology.

Intel Foundry Services (IFS) is a crucial aspect of Intel's IDM 2.0 strategy, aimed at reinforcing its position in technology leadership and long-term growth. Intel 18A, part of Intel's advanced manufacturing process, is generating attention for its potential in enhancing chip performance.

Stuart Pann, Senior VP and General Manager of Intel Foundry Services (IFS), stated that this agreement is a major step in Intel's IDM 2.0 strategy, enabling designers to harness Intel's advanced process technologies and accelerate product launches.

Pann also highlighted Synopsys' strong track record in delivering quality IPs to various customers. This collaboration aims to expedite the delivery of advanced IPs on shared IFS nodes.

Previously, Intel revealed its goal of achieving a non-GAAP gross margin of 60% and operating profit of 40%. Their focus on internal wafer foundry models aims to optimize cost structures and establish leadership in global wafer foundries by 2030.