AMD Zen 6: Medusa, 2.5D Interconnect, Enhanced Bandwidth

In a recent disclosure, it has come to light that AMD has finalized the codename "Medusa" for its upcoming client desktop CPU, based on the highly anticipated next-generation Zen 6 architecture. The market can expect this cutting-edge CPU to hit shelves by late 2025 or early 2026.

Beyond its intriguing codename, the Zen 6 client CPU (or Medusa) showcases an innovative 2.5D chip design for enhanced interconnectivity. This design is poised to deliver superior chip-to-chip bandwidth, facilitating accelerated communication between Zen 6 CCDs and the IOD.

Taking cues from the chip design of AMD's latest flagship GPU, the Navi31, where two MCD stacks represent dual CCDs and a segment of GCD signifies IOD, it suggests that Zen 6 "Ryzen" CPUs may feature a dual CCD chip design with a single I/O chip – similar to the design seen in the successful Ryzen 5000 series. The IOD may also expand to accommodate next-gen technology, although confirmation is pending.

Further details highlight that the Medusa CPU will refrain from stacking CCDs on top of IOD due to the associated high costs. While this specific design may not be immediate, AMD remains open to future explorations, much like the implementation of 3D V-Cache stacking on Ryzen 5000 chips, evolving further with Ryzen 7000 SKUs. As per our earlier communication, AMD's Zen 6 core architecture, codenamed "Morpheus," is set for release between 2025 and 2026.

With the imminent release of Zen 5 in 2024, AMD is poised to share more comprehensive details about its next-gen Zen 6 architecture and the corresponding product lineup. Stay tuned for updates on this groundbreaking technological advancement.