Synopsys & Intel: Advancing 18A Chip Design

Synopsys, Inc. recently announced the successful certification of its artificial intelligence-powered digital and analog design flow for Intel's 18A process at Intel Foundry. This collaboration ensures that clients of both Synopsys and Intel can confidently harness advanced Intel Foundry technology for the design and implementation of innovative chips. With certified EDA processes, holistic bare-die chip system solutions, and IP specifically optimized for Intel 18A process development, Synopsys is well-equipped to empower developers in accelerating the creation of high-performance designs.

In a strategic alliance with Intel Foundry, Synopsys is enhancing its EDA digital and analog design flow to elevate design quality and expedite time-to-results. Focused optimization efforts on Synopsys IP and EDA processes for power and area within the Intel 18A process leverage Intel's PowerVia backend wiring and RibbonFET transistors. The collaboration harnesses Synopsys' design technology co-optimized tools for Intel 18A, aiming to deliver superior power, performance, and area characteristics. Synopsys offers tailored solutions, including the Synopsys Quick Start Kit (QSK) and the Synopsys Process Design Kit (PDK) for Intel 18A, ensuring validated design paradigms for superior quality designs and rapid turnaround.

To capitalize on the advantages of the Intel 18A process and introduce differentiated products to the market, partners of Intel Foundry can seamlessly integrate a comprehensive Synopsys IP portfolio tailored for Intel's advanced process technology. Synopsys provides cutting-edge interface and foundational IP to expedite the SoC design process and reduce time-to-market.

Collaboratively, Synopsys and Intel Foundry drive the progression of multi-die chip systems through the Synopsys 3DIC Compiler platform and Intel's advanced foundry processes. This platform addresses the complex multi-chip system requirements of Intel Foundry chip developers, offering automatic wiring for UCIe interfaces and seamless collaborative design with Intel's EMIB packaging technology. Synopsys' multi-die chip system solutions facilitate early architecture exploration, rapid software development and system validation, efficient chip and package co-design, robust chip-to-chip connectivity, and enhanced manufacturing reliability.