Samsung Triples 3nm Yield, Competes with TSMC's N3P

Recent reports indicate a significant advancement in Samsung's semiconductor manufacturing capabilities, particularly in its 3nm fabrication process. Despite an initial yield rate of only 10-20%, Samsung has substantially improved its yield rate to over three times its original figure, now reaching a peak of 60%. This notable progress positions Samsung competitively in the semiconductor industry, potentially rivalling leading players like TSMC.

Samsung's second-generation 3nm process is rumored to offer exceptional performance, power efficiency, and area optimization, aligning closely with TSMC's cutting-edge N3P technology. While Samsung's 3nm Gate-All-Around (GAA) process has made significant strides, it still lags behind TSMC's 3nm technology based on the existing FinFET process. However, Samsung remains optimistic about the future trajectory of its semiconductor business, with anticipated improvements in power efficiency and logic area compared to previous generations.

At the recent annual shareholders' meeting, Samsung's Co-CEO Kyung Kye-hyun expressed confidence in the semiconductor division's revenue prospects, foreseeing a return to pre-2022 levels. Notably, Samsung's storage business has already achieved profitability in January, marking a significant turnaround. Additionally, Samsung is actively exploring opportunities in high-bandwidth memory (HBM) and emerging high-speed interconnect protocols such as CXL (Compute Express Link) and Processor In Memory (PIM), reflecting its commitment to innovation and customer engagement.

Siyoung Choi, President of Samsung's Foundry Business, emphasized the company's dedication to providing stable and competitive semiconductor solutions. While acknowledging Intel's discussions on advanced process nodes, Choi affirmed Samsung's readiness with relevant process plans. He underscored the importance of stable supply chains and competitive products, citing the maturity of Samsung's 4nm process yield.