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NVIDIA, AMD Discuss FOPLP Packaging with ASE

2024-06-15 11:13:56Mr.Ming
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NVIDIA, AMD Discuss FOPLP Packaging with ASE

According to sources within the Taiwanese industry, there is growing interest in FOPLP (Fan-Out Panel Level Packaging) among AI chip design firms. Two prominent chip manufacturers are currently engaged in discussions with OSAT (Outsourced Semiconductor Assembly and Test) providers regarding potential business opportunities.

Reports indicate that TSMC continues to experience tight capacity constraints with its CoWoS packaging, while ASE Technology is actively advancing FOPLP packaging technology. Alongside ongoing efforts to miniaturize chip manufacturing processes, the semiconductor sector is increasingly prioritizing advanced packaging technologies, including the packaging of chips on larger substrates.

Industry sources have revealed that both NVIDIA and AMD have initiated discussions with ASE Technology, seeking support for FOPLP packaging capacity. However, a key challenge lies in the fact that most semiconductor packaging equipment currently available is primarily geared towards wafer-level packaging. Without strong market demand signals, equipment manufacturers are hesitant to invest in FOPLP equipment production. Some suppliers suggest that if demand becomes clear for 2025, initial small-scale production of FOPLP packaging equipment could begin in 2024, with full-scale production potentially commencing in the latter half of 2025 or 2026.

Presently, existing technology supports panel sizes of 300mm x 300mm and 600mm x 600mm for panel-level packaging. FOPLP offers the advantage of integrating multiple small chip units with an area utilization rate reportedly reaching up to 84%, thereby enhancing production efficiency and lowering costs. Comparative analyses suggest that, at equivalent yield rates, panel-level packaging could reduce production costs by 10% to 15% compared to wafer-level packaging, making it a more cost-effective solution.

Despite potential advancements in FOPLP technology, industry experts caution that it is unlikely to replace CoWoS, given TSMC's patented technology integral to its comprehensive foundry services, which may pose competitive challenges for other companies.

ASE Technology, a significant player in semiconductor assembly and testing, will feature discussions on its future strategies in advanced packaging during its upcoming annual shareholder meeting on June 26th.

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