Intel 18A First Samples Shipped, Mass Production in 2025

On August 6, Intel made a major announcement regarding their cutting-edge Intel 18A process technology. The initial products utilizing this advanced process node—the AI PC client processor Panther Lake and the server processor Clearwater Forest—have successfully completed initial power-on tests and booted up their operating systems. This notable achievement comes less than two quarters after the initial wafer production, highlighting Intel's rapid progress in semiconductor technology.

Both Panther Lake and Clearwater Forest are progressing well, with mass production expected to begin in 2025. Additionally, Intel revealed that their first external customer utilizing the Intel 18A process node is projected to complete wafer production in the first half of the coming year.

Kevin O'Buckley, Senior Vice President and General Manager of Intel Foundry Services, remarked,  "As we advance into the AI era, we are pushing the boundaries with state-of-the-art system-level foundry technologies to provide essential innovations for next-generation products. We are encouraged by the progress of Intel 18A and are working closely with our partners to bring this technology to market by 2025."

In July, Intel released version 1.0 of the Intel 18A Process Design Kit (PDK), allowing partners to utilize the RibbonFET full-wrap gate transistor architecture and PowerVia back-side power delivery technology in their chip designs. EDA and IP partners are currently updating their tools and processes to support the design of new products based on Intel 18A.

This development underscores Intel's leadership in integrating RibbonFET and PowerVia technologies within an accessible process node. With support from ecosystem-provided EDA and IP tools, these groundbreaking technologies are set to deliver advanced performance and energy efficiency benefits. Intel's foundry services are equipped with robust, sustainable manufacturing capabilities and cutting-edge packaging technologies, all essential for developing larger-scale and high-efficiency AI solutions.

The successful operation of Panther Lake and Clearwater Forest without additional modifications highlights the reliability of the Intel 18A process node. Panther Lake's DDR memory performance has achieved the target frequencies, further demonstrating the process node's effectiveness. Clearwater Forest, set for its initial large-scale production next year, will showcase a high-performance solution that combines RibbonFET, PowerVia, and Foveros Direct 3D advanced packaging technologies for superior density and power management. It will also be the first product to utilize Intel's 3-T base-die technology.

Intel's EDA and IP partners gained access to Intel 18A PDK 1.0 in July and are updating their tools and design workflows to facilitate chip design based on this advanced process. This marks a significant milestone for Intel's foundry business.

Tom Beckley, Senior Vice President and General Manager of Custom IC and PCB at Cadence, stated, "By offering industry-leading EDA tools and IP optimized for Intel 18A, Cadence's strategic collaboration with Intel Foundry Services helps accelerate innovation for our mutual customers. We are excited about the advancements with Intel 18A and are eager to support customers in their advanced designs."

Shankar Krishnamoorthy, General Manager of the EDA division at Synopsys, added, "We are thrilled to see Intel Foundry reach this critical milestone. Intel Foundry is well-prepared to offer the Intel 18A process node and integrate the essential elements needed for designing next-generation AI solutions. As a key player in the global wafer foundry industry, Synopsys is proud to collaborate with Intel Foundry in providing leading EDA and IP solutions."

RibbonFET and PowerVia are pivotal technologies of Intel 18A, enhancing transistor scaling and energy efficiency—key factors for advancing AI computing. RibbonFET allows precise control of current within transistor channels, reducing leakage and enabling further chip miniaturization. PowerVia optimizes signal routing and energy efficiency by relocating power lines to the wafer’s backside. The combination of RibbonFET and PowerVia is expected to significantly enhance the performance and battery life of future electronic devices, benefiting global technology leaders with these advanced innovations.