Samsung to Install First High-NA EUV Machine by 2024

Samsung is poised to enhance its semiconductor manufacturing capabilities with the installation of its first high numerical aperture (High-NA) EUV (Extreme Ultraviolet) lithography machine. Set to be operational between Q4 2024 and Q1 2025, this state-of-the-art equipment, featuring a 0.55 numerical aperture, will play a critical role in Samsung's research and development of next-generation semiconductor technologies.

The High-NA EUV machine will be primarily used for R&D purposes, as Samsung is actively developing advanced process technologies that require the precision of High-NA EUV to achieve higher resolution. To support this endeavor, Samsung is collaborating with leading technology companies, including Lasertec, JSR, Tokyo Electron, and Synopsys, to build a robust ecosystem around the High-NA EUV platform.

Industry sources indicate that Samsung may have secured the 8th unit of ASML's Twinscan EXE:5000 High-NA EUV lithography system. ASML has produced only eight units of this cutting-edge machine, with Intel being the first to acquire one and placing additional orders. Samsung's first High-NA EUV lithography system will be installed at its Hwaseong campus, where it will be instrumental in advancing the company's next-generation logic and DRAM manufacturing technologies.

Given the complexity of handling 13.5nm wavelength EUV light, the installation and calibration of the High-NA EUV machine will be a meticulous process. Even if Samsung receives the equipment by the end of 2024, full-scale wafer production is expected to commence in the first half of 2025. While this timeline means Samsung will bring its High-NA EUV machine online about a year later than Intel, it still positions Samsung ahead of other competitors in the semiconductor industry.

Samsung's strategy includes creating a comprehensive ecosystem around High-NA EUV technology. In addition to acquiring the High-NA EUV lithography machine, Samsung is partnering with Lasertec to develop specialized inspection tools for High-NA photomasks. Reports suggest that Samsung has already purchased Lasertec's Actis A300, a High-NA EUV mask inspection tool, which promises to improve contrast by more than 30% compared to conventional EUV tools.

Moreover, Samsung is collaborating with photoresist manufacturer JSR and etching equipment maker Tokyo Electron to pave the way for the commercialization of High-NA EUV lithography by 2027. Samsung is also working with Synopsys to transition from traditional circuit designs to curved patterns on photomasks, a change expected to enhance the precision of circuits imprinted on wafers, which is crucial for advancing process technologies.

The High-NA EUV lithography system from ASML, the Twinscan EXE:5000, will deliver an 8nm resolution, a significant leap from the 13nm resolution achievable with current Low-NA EUV systems using single exposure. This advancement could potentially reduce transistor sizes by approximately 1.7 times and increase density nearly threefold. Although Low-NA systems can reach similar resolutions, they require complex and costly double patterning processes. By adopting High-NA EUV technology, Samsung aims to streamline production, improve yields, and reduce costs by eliminating the need for double patterning.

Achieving these 8nm critical dimensions is essential for the production of chips using sub-3nm process technologies. However, at the 2nm node, most chipmakers, including Intel, will continue to use double patterning. Intel plans to utilize patterning tools for its Intel 20A (2nm) node and intends to adopt High-NA EUV technology at the Intel 14A (1.4nm) node.

The transition to High-NA EUV technology does present challenges. The High-NA EUV equipment is more expensive, with costs ranging from $380 million to $400 million, and it has a reduced imaging range, requiring significant modifications to chip designs. Additionally, the larger size of High-NA EUV systems compared to Low-NA systems will necessitate adjustments in semiconductor fabrication plant layouts to accommodate these advanced machines.