Industry sources report that TSMC, the global leader in semiconductor manufacturing, is expected to receive its first ASML High NA EUV lithography system this month, ahead of Samsung's timeline. The equipment, valued at over 400 million euros, features an extremely large optical lens that cannot be disassembled, with a height exceeding that of a standard meeting room and a length far greater than previous generations. Due to its special and precise specifications, the system will likely require transport through a combination of highways connected to airports or seaports, possibly during late-night hours to avoid traffic disruptions.
ASML has declined to comment on specific customers, while TSMC also responded on the evening of the 9th, stating it does not address market rumors.
However, widespread reports suggest that TSMC's first ASML High NA EUV system will be installed at the company's global R&D center this month, intended for research and development to support the advancement of future semiconductor processes.
ASML has already received orders for its next-generation High NA EUV systems from all of its EUV customers. Last Friday, Greet Storms, Vice President of Product Management for ASML High NA EUV, highlighted in an interview that "ASML continues to push forward with new technologies and has earned the support of every EUV customer during the R&D phase. These are also our High NA customers, and they have all placed orders with us. We hope to move towards mass production by 2026, although this will depend on overall considerations such as customer process costs."
ASML previously confirmed it will deliver the latest High NA EUV system to TSMC by the end of the year. The system, which began shipping in late 2023, is capable of exposing over 185 wafers per hour and will support mass production of logic chips at 2nm and below, as well as memory chips with similar transistor density.
ASML emphasized that the introduction of EUV technology in advanced chip manufacturing simplifies production processes, reduces the number of masks required, and enhances both capacity and yield, ultimately lowering the power consumption per wafer. ASML projects that by 2029, incorporating EUV and High NA EUV lithography systems into advanced processes will save up to 200 kilowatt-hours per wafer, significantly improving overall efficiency in semiconductor production.