Samsung Plans VCT DRAM Integration After 1d nm Node

Samsung Electronics has confirmed its roadmap to introduce Vertical Channel Transistor (VCT) DRAM technology following its current 1d nm (7th-generation 10nm-class) DRAM process. The new technology is expected to debut within the next two to three years.

During the strategic planning phase for its next-generation DRAM process, Samsung evaluated two potential paths: advancing to the 1e nm node or transitioning to VCT DRAM. After in-depth research and technical comparisons, the company opted for VCT DRAM due to its superior performance and efficiency over the conventional 1e nm option.

To accelerate the development of VCT DRAM, Samsung restructured its R&D teams by integrating the 1e nm research group into the 1d nm development team, ensuring a more focused approach to innovation in the 1d nm process.

VCT DRAM represents a significant shift in memory technology, utilizing a vertical channel transistor structure. This design enables higher storage density and lower power consumption, making it a promising candidate for the future of DRAM memory development.

As demand for advanced memory technologies continues to grow, Samsung's move to adopt VCT DRAM underscores its commitment to staying at the forefront of semiconductor innovation.