
TSMC has officially started mass production of its 2nm (N2) process chips. According to the company's N2 process webpage, "TSMC's 2nm (N2) technology began mass production as planned in Q4 2025."
From a performance perspective, the N2 process is designed to deliver a 10–15% performance boost at the same power compared to N3E, while reducing power consumption by 25–30% and increasing transistor density by 15% for hybrid designs combining logic, analog, and SRAM. For pure logic circuits, transistor density improvements can reach up to 20% over N3E.
The N2 node is TSMC's first to use Gate-All-Around (GAA) nanosheet transistors. In this design, the gate completely surrounds a channel formed by stacked horizontal nanosheets. This geometry improves electrostatic control, reduces leakage, and allows smaller transistor sizes without sacrificing performance or energy efficiency, ultimately boosting overall transistor density. N2 also introduces ultra-high-performance metal-insulator-metal (SHPMIM) capacitors in the power delivery network. Compared to previous SHDMIM designs, these capacitors double capacitance density while cutting both sheet resistance (Rs) and via resistance (Rc) by 50%, enhancing power stability, performance, and energy efficiency.
TSMC CEO C.C. Wei highlighted during the October earnings call: "N2 progress is on track, and mass production is expected later this quarter with good yield. We anticipate capacity growth in 2026 driven by smartphones and high-performance computing (HPC) AI applications."
Production has already begun at Fab 22 near Kaohsiung. Earlier expectations suggested that ramp-up would start at Fab 20 near TSMC's global R&D hub in Hsinchu, but production there is now expected slightly later.
Scaling N2 production across a new fab is always challenging. Notably, TSMC will simultaneously produce both smartphone and larger AI/HPC chips at the new fab—a complexity that requires careful management. HPC applications span everything from gaming console SoCs to high-performance server CPUs, while TSMC typically prioritizes mobile and small consumer chips in early production.
The simultaneous operation of two N2-capable fabs reflects strong partner demand for the new technology, ensuring sufficient capacity for all stakeholders. Starting from the end of 2026, these fabs will also produce chips based on N2P (enhanced N2 performance) and A16 (1.6nm, upgraded from N2P with Super Power Rail backside power delivery), specifically designed for complex AI and HPC processors.