Samsung HBM4E Base Die Completes Front-End, 2nm Ahead

According to South Korean media outlet Thelec, Samsung Electronics has completed the front-end design of the base die for its seventh-generation high-bandwidth memory, HBM4E, and has now officially entered the back-end design stage, a key step toward wafer fabrication.

Back-end design involves configuring and routing the physical circuits after the chip's RTL (register transfer level) logic design is finalized. Once completed, the design data is handed over to the foundry for wafer preparation and actual manufacturing. Earlier reports indicate Samsung plans to use its own 2nm process technology for production.

The HBM base die sits at the bottom of the module and manages data read/write speed, error correction, and signal stability for the stacked DRAM layers above. It is considered the core component determining HBM performance and reliability. With rising demand from AI and data center applications, base dies are now integrating more logic functions to meet diverse customer system architectures. Starting with HBM4E, Samsung and SK Hynix plan to adopt logic-based base dies, allowing HBM4E to be tailored to specific client requirements.

Thelec also reports that Samsung recently updated its HBM product roadmap, requesting that supply chain partners submit plans by March. The revised roadmap covers development and production timelines for HBM4, HBM4E, and HBM5, signaling an accelerated commercialization push and a higher focus on customized solutions.

Sources indicate that HBM4 previously targeted general applications, but with HBM4E and HBM5, designs are increasingly customer-specific. The collaboration between base die logic design and foundries is expected to become a key competitive advantage.

Samsung is currently optimizing the EDA tool environment for HBM4E base die development. Vice President Daihyun Lim, an expert in memory interface circuit design who joined Samsung in 2023 after roles at IBM and GlobalFoundries, leads the I/O design.

The original HBM4 DRAM process team is spearheading the development of customized HBM4E base dies and will later handle HBM5 designs. Since HBM4, Samsung has operated a dual-track R&D model, separately managing standard and customized HBM, with the latter serving major AI clients such as Google, Meta, and NVIDIA. The customized team has recently expanded. According to the current schedule, HBM4E is expected to launch in 2027, followed by HBM5 in 2029.