AMD Unveils 2nd-Gen Versal Premium MoP

According to AMD, the company has introduced its second-generation AMD Versal™ Premium Memory on Package (MoP) adaptive System-on-Chip (SoC), designed to deliver higher memory bandwidth while reducing board complexity, space requirements, and development risks for next-generation data-intensive applications.

The new MoP architecture integrates up to 32GB of LPDDR5X memory directly within a single package, providing bandwidth of up to 288GB/s while reducing board-level footprint by as much as 60% compared with conventional external memory implementations. By eliminating the need for complex board-level memory design, the solution enables engineers to accelerate development of high-bandwidth systems while lowering design risk and validation effort.

As workloads such as physical AI, networking, test and measurement, and professional video processing continue to demand greater data throughput within increasingly constrained power and space budgets, AMD positions the Versal Premium MoP platform as a solution optimized for these emerging requirements.

Sumit Shah, Senior Director of Product Management and Marketing for AMD’s Adaptive and Embedded Computing Group, said that system architects have traditionally been forced to balance memory bandwidth requirements against constraints related to board space, power consumption, and product lifecycle. He noted that the MoP architecture removes many of these compromises, enabling customers to design around system objectives rather than memory limitations and helping accelerate time-to-market.

Higher Bandwidth in a Smaller Footprint

By integrating LPDDR5X memory directly into the package, the second-generation Versal Premium MoP devices deliver improved performance and a more compact design compared with traditional board-mounted memory solutions. The approach enables new system form factors that were previously difficult or impractical to implement using discrete memory architectures.

AMD highlighted that the technology can support space-constrained deployments, including Enterprise and Data Center Standard Form Factor (EDSFF) designs and advanced telecommunications infrastructure, where board area, thermal efficiency, and system density are critical considerations.

Advanced Connectivity and Memory Expansion

The second-generation Versal Premium MoP family incorporates hardened 64Gb/s CXL® 3.1 and PCIe® 6.0 interfaces, enabling high-speed connectivity when paired with AMD EPYC™ processors. These capabilities are intended to accelerate data-intensive applications through faster data movement and system-level scalability.

Support for LPDDR5X speeds of up to 9,600Mb/s further enhances memory performance. In addition, compatibility with CXL memory pooling and expansion technologies provides system architects with greater flexibility to scale memory resources according to workload requirements.

Designed for Long-Lifecycle Industrial and AI Deployments

AMD stated that the new adaptive SoCs are engineered for demanding industrial, enterprise, and AI environments, supporting operating temperatures ranging from -40°C to 110°C. This makes them suitable for always-on, mission-critical systems where reliability and sustained performance are essential.

The devices combine LPDDR5X memory with more than 15 years of planned lifecycle support, helping mitigate supply-chain and redesign challenges associated with High Bandwidth Memory (HBM), which typically follows shorter refresh cycles driven by data center market demand. This long-term availability can reduce the risk of redesigns caused by memory obsolescence or supply limitations.

Integrated Security Features

Security enhancements are built into the platform through PCIe Integrity and Data Encryption (IDE), a feature introduced with PCIe 6.0 that protects data in transit at the link layer against physical attacks.

The integrated DDR memory encryption engine secures data at rest without consuming programmable logic resources, while a hardened 400G cryptographic engine enables high-bandwidth secure processing without compromising throughput.

Accelerating System Development

AMD emphasized that the second-generation Versal Premium MoP devices include pre-validated in-package LPDDR5X interfaces, eliminating the need for complex high-speed memory routing on printed circuit boards. This reduces board-level simulation and validation requirements, shortens development cycles, lowers engineering risk, and minimizes the likelihood of costly redesigns and additional silicon iterations.

Developers can begin prototyping today using currently available standard second-generation AMD Versal Premium devices. Support for established AMD Vivado™ and Vitis™ development environments, compatible IP portfolios, and reference designs enables a smoother transition from concept to deployment while allowing existing users to adopt the new MoP devices without significant redesign efforts.

AMD expects engineering samples of the second-generation Versal Premium MoP adaptive SoCs to become available by the end of 2026, with volume production scheduled for the second half of 2027.