
According to industry sources, Samsung Electronics is accelerating the commercialization of its 1.4nm process technology (SF1.4), with mass production targeted for 2027 as the company seeks to strengthen its position in the global advanced foundry market and challenge the dominance of Taiwan Semiconductor Manufacturing Company (TSMC).
Industry observers note, however, that success in leading-edge semiconductor manufacturing is determined less by process node branding and more by key metrics such as performance, power efficiency, area (PPA), yield rates, extreme ultraviolet (EUV) lithography deployment, and large-scale production capabilities. Securing orders from major AI chip developers will ultimately depend on the maturity and reliability of the manufacturing process.
Samsung's SF1.4 technology will utilize the company's Gate-All-Around (GAA) transistor architecture and is expected to target high-performance computing (HPC), automotive electronics, 5G infrastructure, and other advanced applications. The company aims to expand its presence beyond the smartphone market and increase its share in emerging high-growth sectors.
Despite these ambitions, semiconductor analysts indicate that Samsung's current commercial SF2 process still trails TSMC's N3P technology in several PPA metrics. Some chipmakers believe that SF1.4 may represent an evolutionary extension of Samsung's SF2 platform rather than a dramatic technological leap. As a result, the industry's focus remains on whether the process can achieve the yield, performance, and production readiness required for qualification by major customers.
EUV lithography remains a critical factor in advanced node manufacturing. Equipment industry sources suggest that TSMC is expected to deploy more than 40 EUV systems next year, significantly outpacing Intel's estimated 9 to 11 systems and Samsung's projected 5 to 7 systems. The gap highlights the scale of investment required to support high-volume production of advanced semiconductor technologies.
Meanwhile, market sources report that TSMC has adjusted plans for three additional facilities at its Fab 18 site in Tainan, directing them fully toward 2nm production. The move reflects growing demand from AI GPUs, custom AI accelerators (ASICs), and next-generation high-performance CPUs, all of which require increasingly advanced process technologies.
Industry estimates suggest that by the end of 2028, TSMC's combined monthly production capacity for 2nm and 3nm technologies could reach approximately 400,000 wafers. This would be roughly ten times greater than the estimated 40,000 to 50,000 wafers per month projected for Intel's 14A and 18A nodes and would also exceed Samsung's anticipated advanced-node capacity.
Demand visibility for TSMC's 2nm process continues to improve, driven by major customers including Apple Inc., NVIDIA, AMD, MediaTek, and Qualcomm. As AI processors become larger and increasingly dependent on advanced packaging technologies, customers are placing greater emphasis on manufacturing yield, supply reliability, and long-term capacity commitments.
While Samsung continues to pursue foundry growth through its SF2 and SF1.4 technologies, industry experts believe that achieving consistent yields and sufficient production scale remains essential for winning high-volume orders from leading semiconductor designers.
Samsung and Intel are expected to continue narrowing the technology gap, but TSMC's advantages in manufacturing scale, customer relationships, yield learning curves, and EUV deployment are likely to limit near-term competitive pressure. Some market observers have even begun evaluating the possibility that Intel could outsource certain future 2nm-class server CPU production to TSMC if internal 18A or 14A manufacturing targets fall short of expectations.
Industry analysts view Samsung's commercialization efforts for SF1.4 as a significant milestone in the transition toward sub-2nm semiconductor manufacturing. However, the ultimate winners in the advanced process race will be determined by yield performance, manufacturing capacity, and execution capabilities rather than process node names alone.