TSMC CoWoS Orders Surge, Intel Supports Shared Customers

According to industry sources, TSMC’s advanced packaging capacity, particularly its Chip-on-Wafer-on-Substrate (CoWoS) technology, remains heavily oversubscribed as demand from AI chip customers continues to rise. Some backend advanced packaging orders are reportedly being shifted to Intel’s Malaysia facility, which could provide additional capacity and support shared major customers. The development marks a notable change from the traditional semiconductor industry ecosystem.

The potential collaboration could not only help TSMC accelerate shipments of chips manufactured using its advanced process technologies but also benefit companies across the overlapping supply chain, including ASE Technology Holding, substrate maker Unimicron, and equipment company Gudeng Precision.

Industry sources said on August 18 that the global advanced packaging bottleneck is increasingly concentrated in backend capacity, where capacity expansion has lagged behind frontend wafer processing. TSMC is therefore expected to welcome more packaging companies joining the backend manufacturing process, as additional capacity could help accelerate the shipment of wafers produced using its leading-edge process technologies.

TSMC Chairman and CEO C.C. Wei previously said during an earnings call that the company remains focused on frontend advanced packaging, while it welcomes additional external capacity for backend processes where shortages persist. Greater backend capacity would provide customers with more flexibility and help TSMC address its significant advanced packaging capacity gap.

Wei also said that, based on industry reports, the relevant technology has promising prospects and that TSMC hopes other companies can successfully develop their capabilities. Such alternatives could help relieve part of TSMC’s capacity pressure while giving customers more packaging options.

An easing of the advanced packaging bottleneck could also strengthen momentum across the semiconductor supply chain. Unimicron executives previously said during an earnings call that the company had secured customer commitments and was working with two Japanese companies to advance technology development, with mass production of applications related to Intel’s EMIB-T technology targeted for 2027.

ASE Technology Holding Chief Operating Officer Tien-Yu Wu has also said that CoWoS, EMIB and other advanced packaging technologies are not necessarily direct substitutes. If customers choose Intel’s EMIB-T technology, ASE can also procure the required substrates and provide backend assembly and final testing services, allowing the company to support customers across different packaging technology routes.

According to export data from SemiAnalysis Chipbook, around $1.3 billion worth of high-bandwidth memory (HBM) has already been shipped to Malaysia, while the value of HBM shipments to Taiwan has fallen below $3 billion. Industry analysts believe Intel’s Malaysia operations may be one of the few facilities with the capability to integrate HBM at scale into advanced chip products, fueling speculation that Intel’s Malaysia facility could provide backend advanced packaging capacity for some orders.

Intel CEO Lip-Bu Tan recently said in a media interview that the company’s next-generation EMIB-T advanced packaging technology is being developed to achieve reliable yields. With the industry facing well-known CoWoS capacity shortages, Intel is in a relatively unique position to provide additional support. Tan also noted that substrate supply remains extremely tight, with several customers already making advance payments for substrates, a development he described as encouraging for Intel.

As AI accelerator demand continues to expand, the availability of advanced packaging, HBM and substrates is becoming increasingly important to overall chip production. Additional backend capacity from Intel and other packaging providers could help ease bottlenecks and improve flexibility across the AI semiconductor supply chain.