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Intel Mass Produces Foveros 3D: $3.5B U.S. Facility

2024-01-26
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Intel Mass Produces Foveros 3D: $3.5B U.S. Facility

Intel proudly announces the successful large-scale production of cutting-edge semiconductor packaging solutions, featuring the revolutionary 3D Foveros advanced packaging technology. Operations at the state-of-the-art Fab 9 facility in Rio Rancho, New Mexico, have commenced with a substantial investment of $3.5 billion. This facility is strategically dedicated to leveraging Foveros 3D packaging technology for chip processing, positioning itself as one of Intel's premier factories focused on pioneering advanced packaging techniques.

Keyvan Esfarjani, Intel's Executive Vice President and Chief Global Operations Officer, expresses enthusiasm, stating, "We celebrate the inauguration of Intel's first high-volume semiconductor business factory, the sole facility in the United States manufacturing globally advanced packaging solutions at scale. This cutting-edge technology distinguishes Intel, providing significant advantages in performance, form factor, and design application flexibility for our valued customers, all contributing to a resilient supply chain."

Beyond this milestone, Intel has applied Foveros 3D to develop the latest Core Ultra "Meteor Lake" processors for client applications and the Ponte Vecchio GPU for artificial intelligence (AI) and high-performance computing (HPC). As Intel and its Intel Foundry Services (IFS) contract chip manufacturing customers increasingly embrace multi-chip designs, the adoption of Foveros 3D is anticipated to witness substantial growth in the coming years.

The current iteration of Intel's Foveros 3D relies on a 600mm^2 interposer produced using its cost-effective, low-power 22FFL process technology, serving as the power delivery foundation for interconnecting and stacking small chips (Chiplets) on top. Presently featuring a 36-micrometer bump pitch, Foveros 3D supports up to 770 microbumps per square millimeter and offers a bandwidth of up to 160GB/s per millimeter. Future iterations of the technology are poised to adopt 25-micrometer and 18-micrometer microbump pitches, substantially enhancing interconnect density. Furthermore, Intel's Co-EMIB technology can interconnect multiple Foveros 3D interposers, facilitating the construction of large-scale data center-level devices.

Highlighting the industry trend towards integrating multiple Chiplets in a single package, Intel's advanced packaging technologies, including Foveros 3D and 2.5D EMIB, aim to integrate a trillion transistors in a single package, propelling Moore's Law beyond 2030.

Addressing market demand, Intel emphasizes that the capacity for its Foveros 3D advanced packaging is planned to quadruple by 2025. The surging demand for high-performance computing, including AI operations, is driving capacity expansions in the advanced packaging sector. TSMC's CoWoS advanced packaging capacity is also actively expanding, with estimates indicating an increase from 32,000 wafers per month at the end of 2024 to 44,000 wafers per month by the end of 2025. Intel's announcement of the mass production of Foveros 3D advanced packaging technology is expected to heighten competition in the advanced packaging market.

The establishment of an advanced packaging facility in New Mexico represents a pivotal step in Intel's overarching strategy to bolster the production of advanced semiconductor products in the United States. In addition to Fab 9, the company is actively constructing multiple leading wafer fabs in Arizona and Ohio.

 

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