Recently, industry analyst Ming-Chi Kuo provided an update on Nvidia's next-generation AI chip, the R100 series, designed to cater to the burgeoning demand for advanced computing solutions. Named after renowned astronomer Vera Rubin, the R100 is slated to commence mass production by the end of 2025.
Kuo's insights suggest that the R100 will leverage TSMC's cutting-edge N3 process, coupled with CoWoS-L packaging technology. While the exact dimensions of the interposer remain undecided, there are currently 2-3 potential options under consideration. Additionally, there's a possibility of upgrading the accompanying High Bandwidth Memory (HBM) to HBM4, further enhancing performance.
Presently, Nvidia's GH200 and GB200 CPUs utilize TSMC's N5 process, while the recently introduced B100 integrates TSMC's N4P process, all housed within CoWoS-L packaging. The adoption of TSMC's N3 process for the GR200 is highly anticipated.
According to projections, Nvidia aims to kickstart mass production of the R100 processor in the fourth quarter of 2025, with system and rack solutions expected to follow suit in the first half of 2026.
However, it's noteworthy that the B200 GPU configuration can peak at a power consumption of 1,000W, while the GB200 solution can reach up to 2,700W. This poses challenges in terms of power management and cooling during data center operations. Recognizing the escalating energy consumption in AI server infrastructure, Nvidia is strategically focusing on energy efficiency enhancements alongside boosting AI computing power with the R series of chips and system solutions.