TSMC 2025 Wafer Prices Up 10%, CoWoS Soars 20%

Due to robust demand in consumer electronics and high-performance computing, TSMC plans to increase wafer prices across all customer segments in 2025. Morgan Stanley's analysis indicates a projected 10% price hike by TSMC next year.

Negotiations with AI and high-performance computing leaders, such as Nvidia, suggest they are willing to absorb a 10% increase in 4-nanometer wafer prices, rising from approximately $18,000 to about $20,000 per wafer. Consequently, AMD and Nvidia, major users of 4-nanometer and 5-nanometer nodes, may experience an 11% average selling price (ASP) increase. This implies a potential 25% rise in N4/N5 wafer prices for some clients since Q1 2021.

Despite challenging discussions with smartphone and consumer electronics giants like Apple, there are indications they are accepting modest price adjustments. Morgan Stanley forecasts a 4% ASP rise for 3-nanometer wafers in 2025. While specific pricing depends on agreements and volumes, analysts estimate current production costs for TSMC's N3 node wafers at $20,000 or higher, with increases anticipated next year. Analysts believe TSMC has flexibility to pass on these additional costs to end-users.

In contrast, mature nodes such as 16-nanometer are unlikely to see price increases due to ample capacity.

To potentially incentivize customer acceptance of these adjustments, a recent Morgan Stanley supply chain survey suggests TSMC may signal advanced process capacity shortages unless customers "recognize TSMC's value" to secure allocation.

Additionally, Morgan Stanley analysts anticipate a possible 20% increase in prices for advanced CoWoS packaging over the next two years.

Having raised wafer prices by 10% in 2022 and an additional 5% in 2023, TSMC anticipates a cumulative 5% increase in 2025 to support gross margin recovery to 53% - 54% by that year.