Samsung to Start HBM4 Wafer Production by Year-End

Samsung Electronics is preparing to start wafer production for its 6th generation high-bandwidth memory, HBM4, by the end of this year. This phase is a critical step towards the anticipated mass production of 12-layer HBM4 modules, projected to commence by the end of next year.

Wafer production, the final stage in semiconductor design, involves transferring detailed design plans to semiconductor manufacturing facilities. This stage, also known as mask wafer production (MTO), includes the creation of photomasks.

Test versions of the HBM4 are expected to be available as early as the beginning of next year, with final test products becoming available approximately 3 to 4 months after wafer production. Samsung plans to validate the performance of the initial HBM4 products, followed by design and process refinements. The company will then carry out product sampling for key clients. A Samsung representative noted that details regarding the product roadmap and specific timelines are not yet disclosed.

In parallel, SK Hynix is gearing up for mass production of 12-layer HBM4 products, scheduled for the latter half of next year. Both Samsung and SK Hynix will transition to foundry processes for producing logic chips starting with HBM4, diverging from traditional DRAM manufacturing methods. Samsung intends to utilize its 4nm foundry process for large-scale production, while SK Hynix will adopt TSMC’s 5nm and 12nm processes.

Regarding memory core chips, Samsung will use 10nm (1c) DRAM for its 6th generation HBM4, whereas SK Hynix's process will be positioned between the 5th generation 10nm (1b) DRAM and 1c DRAM. An SK Hynix representative involved in HBM development mentioned that the company initially chose 1b DRAM as the core chip for HBM4. However, with Samsung using 1c DRAM, SK Hynix is reevaluating its choice between 1b and 1c DRAM.