On September 26, SK Hynix announced the world's first mass production of its 12-layer HBM3E memory, achieving a groundbreaking capacity of 36GB, the largest available in the HBM category.
*HBM (High Bandwidth Memory): This high-value, high-performance memory vertically interconnects multiple DRAM chips and dramatically increases data processing speed in comparison to traditional DRAM products. HBM3E is the extended version of HBM3, the fourth generation product that succeeds the previous generations of HBM, HBM2 and HBM2E.
*Previously, the maximum capacity of HBM3E was 24GB from eight vertically stacked 3GB DRAM chips.
Following its introduction of the 8-layer HBM3E earlier this year, this new product demonstrates SK Hynix's overwhelming technological capabilities, as the company continues to meet the evolving demands of AI enterprises. The company emphasizes its unique position in the market, being the sole developer of a complete range of HBM products from HBM1 to HBM3E.
The 12-layer HBM3E excels in speed, capacity, and stability, setting new global standards. It operates at a remarkable speed of 9.6 Gbps, enabling efficient processing for advanced applications like the Llama 3 70B language model, which can read vast datasets rapidly.
*Llama 3: Open-source LLM released by Meta in April 2024, with 3 sizes in total: 8B (Billion), 70B, and 400B.
To achieve this, SK Hynix has innovatively stacked 12 three-gigabyte DRAM chips while maintaining the same thickness as the existing 8-layer version, resulting in a 50% capacity increase. The company has achieved this by reducing the thickness of individual DRAM chips by 40% and employing Through Silicon Via (TSV) technology for vertical interconnection.
Additionally, SK Hynix has addressed structural challenges associated with stacking thinner chips. Utilizing its advanced MR-MUF process, the company has enhanced thermal performance by 10% over the previous generation and improved warpage control, ensuring reliability and stability.
*TSV (Through Silicon Via): This advanced packaging technology links upper and lower chips with an electrode that vertically passes through thousands of fine holes on DRAM chips.
*MR-MUF (Mass Reflow Molded Underfill): The process of stacking semiconductor chips, injecting liquid protective materials between them to protect the circuit between chips, and hardening them. The process has proved to be more efficient and effective for heat dissipation, compared with the method of laying film-type materials for each chip stack. SK hynix's advanced MR-MUF technology is critical to securing a stable HBM mass production as it provides good warpage control and reduces the pressure on the chips being stacked.
Justin Kim, President of SK Hynix's AI Infra division, stated, “We have once again pushed technological boundaries, affirming our unique leadership in the AI memory market. As we prepare for the challenges of the AI era, we are committed to developing the next generation of memory products to maintain our position as a top-tier global supplier of AI-focused memory solutions.”