Samsung to Launch 400-Layer V-NAND for AI Servers by 2026

Samsung Electronics, the world's largest manufacturer of memory chips, has announced its ambitious plan to introduce 400-layer V-NAND flash memory by 2026, positioning itself at the forefront of the rapidly growing storage device market driven by artificial intelligence (AI).

According to Samsung's semiconductor development roadmap, the Device Solutions (DS) division aims to begin mass production of V-NAND featuring a minimum of 400 vertically stacked layers by 2026, maximizing both capacity and performance. Currently, Samsung produces the V9 NAND flash memory with 286 layers. In traditional NAND architectures, memory cells are stacked atop peripheral devices, which serve as the chip's operational core. However, stacking 300 layers or more often risks damaging these peripherals.

To address this challenge, Samsung is implementing innovative bonding technology in its advanced V10 NAND, where memory cells and peripheral devices will be fabricated on separate wafers before being bonded together. This approach is expected to achieve "ultra-high" NAND stacking, delivering substantial storage capacity and excellent thermal performance, making it ideal for high-capacity solid-state drives (SSDs) used in AI data centers.

Samsung refers to this new chip as bonded vertical NAND (BV NAND), claiming it to be the "ideal NAND for AI." Since pioneering vertical stacking technology in 2013 with V-NAND chips, Samsung has significantly enhanced capacity. The company asserts that its BV NAND can increase bit density by 1.6 times per unit area.

Looking ahead, Samsung aims to introduce the V11 NAND by 2027, which is projected to boost data input and output speeds by 50%, further advancing stacking technology. Additionally, the company plans to offer SSD ordering services targeting technology firms managing high-cost AI semiconductor investments.

As of the second quarter, Samsung has secured a dominant position in the NAND market, controlling 36.9% of the global share, according to market research firm TrendForce. Samsung executives have expressed their goal to develop NAND chips exceeding 1,000 layers by 2030 to enhance density and storage capabilities.

To maintain its leadership in DRAM technology, Samsung plans to launch its sixth-generation 10nm DRAM (1c DRAM) and seventh-generation 10nm DRAM (1d DRAM) by the end of 2024, catering to advanced AI chips such as HBM4. Furthermore, Samsung's memory roadmap includes the introduction of DRAM below 10nm, termed 0a DRAM, in 2027. This new DRAM will feature vertical channel transistors (VCT) with a three-dimensional structure, similar to the technology used in NAND flash, enhancing both performance and stability.

By vertically stacking cells, VCT DRAM aims to minimize interference between units, thereby increasing capacity. Samsung is also accelerating the development of AI-specific memory products beyond HBM, such as low-power memory processing (LP-PIM).

As Samsung promotes its NAND offerings, Jun Young-hyun, Vice Chairman and head of the DS division, emphasizes the need for significant corporate reforms. While Samsung maintains a stronghold in the overall DRAM market, it faces fierce competition in the HBM sector from SK Hynix, the second-largest memory manufacturer globally and a key supplier of high-end HBM chips for NVIDIA.

According to Gartner, the global storage market is expected to grow from $92 billion in 2024 to $227 billion by 2026. Samsung anticipates annual growth rates of 27% for server DRAM and 35% for enterprise SSDs (eSSD) during the period from 2024 to 2029.