TSMC A14 Node Still Not Adopting High-NA EUV Lithography

While Intel is moving forward with ASML's next-generation High-NA EUV lithography systems in the development of its Intel 18A process, TSMC is taking a more conservative approach. Even for its most advanced upcoming A14 process node, TSMC has no plans to adopt the expensive High-NA EUV tools.

Dr. Kevin Zhang, Senior Vice President of Business Development and Global Sales at TSMC, has previously stated that while the capabilities of High-NA EUV are impressive, the price tag—exceeding €350 million (around $378 million)—makes it less attractive at this stage. TSMC believes that existing standard EUV systems are sufficient to support its leading-edge manufacturing through 2026, including the production of the upcoming A16 process node.

Reaffirming the company's position, Dr. Zhang recently confirmed that both the A16 (1.6nm-class) and A14 (1.4nm-class) nodes will continue using standard EUV lithography systems rather than adopting High-NA EUV tools. TSMC's A14 process is based on the second-generation nanosheet gate-all-around (GAA) transistor architecture and introduces a new standard cell design. According to the company, A14 delivers up to a 15% performance boost at the same power and complexity, or reduces power consumption by 25% to 30% at the same performance level. In terms of transistor density, A14 offers a 20% improvement in mixed logic/SRAM/analog configurations and a 23% gain in pure logic over the previous N2 node.

Dr. Zhang emphasized that these advancements represent a "full-node advantage" for the A14 process. He added that TSMC can achieve the required performance, power efficiency, and yield predictability without deploying next-gen High-NA EUV systems for either the A16 or A14 nodes.

The A16 node is essentially an evolution of N2P and incorporates a Super Power Rail (SPR) backside power delivery network. Because High-NA EUV was not needed for N2 or N2P, it will also not be required for A16. On the other hand, A14 is a brand-new node set to enter volume production in 2028. The fact that it does not require High-NA EUV is seen as a significant milestone.

When asked whether the A14 process heavily depends on complex multi-patterning techniques, Dr. Zhang declined to provide detailed technical specifics. However, he noted that TSMC's engineering team has developed a method to manufacture A14 chips using standard EUV systems, which offer 13.5nm resolution, as opposed to the 8nm resolution possible with High-NA EUV.

The first-generation A14 process is expected to be succeeded by a second-generation A14 node in 2029, featuring SPR backside power delivery. Notably, TSMC is not planning to adopt High-NA EUV lithography even for this future iteration.

In contrast, Intel plans to implement High-NA EUV in its 14A process between 2027 and 2028. This move is aimed at improving precision, reducing the number of EUV exposures, and minimizing process steps.

According to ASML's latest financial reports, the company has shipped five High-NA EUV tools, with Intel receiving the majority. Samsung is also believed to have acquired one or two units and is reportedly forming a dedicated team to target 1nm production by 2029.