Samsung Boosts 10nm DRAM Yield, HBM4 Production Set for 2025

Samsung Electronics is making a strong push to reclaim its leadership in the DRAM market after losing its top position in Q1 to SK hynix, mainly due to challenges in the AI-optimized High Bandwidth Memory (HBM) segment. With significant improvements in the yield of its next-generation DRAM, Samsung is now rapidly advancing into mass production—a development seen as a clear indicator of its readiness to begin HBM4 production later this year.

According to industry sources, Samsung achieved a yield rate of 50–70% in performance tests conducted last month for its sixth-generation 10nm-class DRAM wafers, marking a major improvement from less than 30% a year ago. This progress is largely attributed to a strategic redesign by Samsung's R&D team, which introduced several structural innovations to enhance chip efficiency and manufacturing productivity.

Samsung initially planned to begin mass production of its sixth-generation 10nm-class DRAM at the end of last year. However, the decision to overhaul the chip architecture led to a delay of over a year. Now, the company is investing aggressively to build out its production lines in advance, preparing to begin volume output immediately following final validation later this year. This move is expected to significantly strengthen Samsung's position in the HBM4 segment.

The latest investments are centered on Samsung's Line 4 at its Pyeongtaek campus, where production will target both LPDDR (Low Power Double Data Rate) memory for mobile devices and server applications. Meanwhile, HBM4-related sixth-gen DRAM is being produced at Pyeongtaek Line 3.

An industry expert noted, “The fundamental structure of the memory cell—the core of DRAM—is quite similar between mobile/server DRAM and HBM, so this development will positively impact the advancement of DRAM for HBM applications.” With successful mass production now underway, Samsung is expected to further ramp up investment in its HBM4 process at Pyeongtaek Line 3.