According to Taiwanese media reports, TSMC's upcoming 2nm process wafer pricing is expected to be around $30,000 per wafer, representing only a 10%-20% increase over the 3nm process, far below earlier rumors of a 50% jump.
Back in late September, reports suggested that TSMC's third-generation 3nm process (N3P) had already seen a roughly 20% price increase compared to the previous N3E generation, and speculation had predicted a 50% rise for the upcoming 2nm process. In reality, 3nm wafer prices vary by generation—ranging from about $25,000 to $27,000 per wafer—while the new 2nm wafers are priced around $30,000, confirming a moderate 10%-20% increase.
Ahmad Khan, President of Semiconductor Products & Solutions at U.S.-based KLA, recently stated at a Goldman Sachs event that TSMC's 2nm process has already secured 15 clients, 10 of which focus on high-performance computing (HPC) applications, with the remainder likely serving mobile chip markets.
Historically, TSMC's most advanced nodes were primarily adopted by mobile processor leaders like Apple, Qualcomm, and MediaTek. However, the rise of AI has dramatically increased demand for cutting-edge nodes from HPC clients, making the modest price increase for TSMC's 2nm process more acceptable.
Meanwhile, TSMC's 3nm, 4nm, 5nm, and 7nm advanced nodes are running near full capacity. The company confirmed price increases for next year in the single-digit percentage range for advanced nodes, varying by client, while less advanced nodes are unlikely to see a rise. Supply chain sources also indicate that TSMC’s annual negotiations with upstream partners have included requests for 10%-20% average cost reductions.