
On October 21, wafer foundry UMC held its Q3 earnings call. While overall results were moderate, UMC CEO Martin Chu noted that rising memory chip prices helped improve operational performance in the third quarter. He expects wafer shipments and DRAM foundry prices to continue climbing in Q4, with the trend likely extending into the first half of next year.
UMC reported Q3 revenue of NT$11.841 billion, up 5% quarter-on-quarter, with a slightly reduced net loss of NT$0.65 per share. Capacity utilization increased from 75% in the previous quarter to 78%.
Chu highlighted that high-end memory for AI applications remains in strong demand, with AI-related products like HBM experiencing ongoing shortages. In the traditional memory sector, three trends were observed: first, niche DRAM (e.g., DDR3/DDR4) saw constrained supply as foundries prioritize HBM and other high-value products, pushing prices higher. Second, SLC NAND Flash prices began rising in Q3 following production cuts by major manufacturers, although growth remains modest due to limited bulk demand and the lack of breakthrough new applications.
For NOR Flash, demand has surged with the rise of AIoT applications, favoring low-power, high-reliability solutions, and recent market prices have shown a steady upward trend. Higher prices and supply tightness encouraged memory clients to increase wafer bookings in Q3, and with supply gaps expected to persist, Q4 shipments and prices are likely to continue their growth, potentially extending into mid-2026.
In logic foundry, overall capacity utilization fell 5–10%, reflecting weaker mid-to-low-end demand, even as new flagship smartphone releases in September and October stimulated premium device orders.
On the advanced front, UMC has entered Proof of Concept (PoC) stages with several clients and aims to start mass production in the second half of next year. In the silicon interposer segment, new tape-out activity remains strong, trial production is underway, and yields have reached mass-production levels. UMC plans to gradually increase wafer output to meet AI chip customers' needs for high-performance, high-density packaging.