TSMC Doubles Expansion Speed as Five 2nm Fabs Ramp Up

According to a report by the Taiwanese media outlet Commercial Times, TSMC is accelerating its advanced process capacity expansion at an unprecedented pace to meet surging demand from artificial intelligence (AI) and high-performance computing (HPC) applications.

At the company’s recent North America Technology Symposium, Hou Yongqing revealed that TSMC is effectively operating at “double speed” compared to previous expansion cycles. By 2026, five 2nm fabs are expected to simultaneously enter ramp-up to volume production, marking the most aggressive capacity build-out in the company’s history.

Hou noted that TSMC’s 2nm process officially entered mass production in the fourth quarter of 2025, with yield learning curves outperforming the previous 3nm generation. Despite adopting more complex nanosheet transistor architecture, the company has achieved rapid improvements in manufacturing stability, reinforcing its leadership in advanced process technologies. Meanwhile, development of the next-generation A16 process—integrating backside power delivery—continues to progress, targeting the stringent performance and power efficiency requirements of AI and automotive applications.

On the capacity front, TSMC has initiated an unprecedented expansion strategy since last year. The simultaneous ramp-up of multiple 2nm fabs within a single year represents a departure from past practices and highlights how AI-driven demand is pushing the semiconductor industry into a phase of ultra-rapid expansion. As a result, first-year 2nm output is projected to increase by approximately 45% compared to the equivalent stage of 3nm, demonstrating significantly improved capacity deployment efficiency.

In parallel, TSMC is accelerating global expansion of its 3nm process. Historically, the company would limit additional capacity once a node reached its target output. However, given its role as a dedicated foundry, TSMC emphasized that its priority is to provide cutting-edge technology and sufficient capacity to support customer innovation.

During its previous quarterly earnings call, TSMC highlighted plans to further increase capital expenditures to expand N3 capacity, driven by strong AI-related demand. The company is executing a global expansion program to support applications across smartphones, HPC, AI (including HBM-based chips), automotive electronics, and the Internet of Things (IoT).

According to Economic Daily News, citing industry sources, TSMC’s 3nm fabs in Taiwan were originally expected to reach a monthly capacity of 150,000 wafers by the end of 2026. This figure is now projected to rise to 180,000 wafers—an increase of over 40% year-on-year and about 20% above earlier estimates. A new 3nm fab in the Southern Taiwan Science Park is also expected to begin mass production in the first half of 2027, ahead of its initial 2028 timeline. Meanwhile, TSMC’s second fab in Arizona has been completed and is scheduled to start 3nm production in the second half of 2027, while a second fab in Kumamoto, Japan, is transitioning to 3nm and is expected to enter production in 2028.

Overall, TSMC is significantly accelerating its expansion pace. Hou disclosed that between 2025 and 2026, the company will advance an average of nine new fab construction or capacity conversion projects annually—roughly double its historical rate. Key expansion sites include Arizona in the United States, Kumamoto in Japan, and Dresden in Germany, strengthening geographic supply chain resilience.

Supported by robust advanced-node capacity, AI chip shipments are rising sharply. Hou stated that wafer shipments for AI accelerators are expected to grow 11-fold between 2022 and 2026, while demand for large die sizes is projected to increase sixfold, reflecting a shift toward highly integrated, high-performance AI computing architectures.

In advanced packaging, TSMC is also scaling investment. Technologies such as CoWoS and SoIC continue to evolve, with significantly shortened time-to-volume production. Notably, the introduction timeline for SoIC has been reduced by approximately 75%, enabling faster product commercialization. Overall, advanced packaging capacity is expected to grow by around 80% between 2022 and 2027, underscoring its transformation into a critical competitive factor for AI chips.

With 2nm entering mass production, five fabs ramping simultaneously, and a global “double-speed” expansion across both advanced nodes and packaging technologies, TSMC is reinforcing its central role in the AI semiconductor ecosystem. Industry observers expect the company to further extend its technological lead and shape the next phase of semiconductor industry growth.