TSM and Samsung Diverge on 1nm Process Strategy
According to Korean media outlet ZDNet Korea, citing industry sources, TSMC and Samsung Electronics are taking increasingly divergent strategies in the race toward the 1-nanometer (1nm-class) semiconductor process era, reshaping the competitive landscape of advanced semiconductor manufacturing.
TSMC is reportedly planning to enter the 1.x-nanometer generation around 2027, with a continuous roadmap of derivative nodes following afterward. In contrast, Samsung is said to have delayed its 1.4nm (SF1.4) mass production timeline to 2029, while shifting its focus toward improving the yield rate and production stability of its 2nm process technology.
At its first-quarter 2026 earnings call and North America Technology Symposium, TSMC outlined a detailed next-generation process roadmap. The “A16” node, approximately equivalent to a 1.6nm-class process, is positioned as a key milestone marking the transition into the angstrom-era semiconductor technology. Beyond A16, the company is also planning further advancements toward nodes such as A14 and beyond.
A major technological highlight in TSMC’s roadmap is the introduction of backside power delivery network (BSPDN) technology, including its Super Power Rail (SPR) architecture. This innovation is designed to reduce electrical resistance and power loss, thereby improving overall chip efficiency. It is particularly critical for high-performance computing (HPC) and artificial intelligence (AI) workloads, where power efficiency and performance density are essential.
Meanwhile, Samsung is adopting a more pragmatic and execution-focused strategy. Although the company was the first to commercially introduce gate-all-around (GAA) transistor architecture at the 3nm node in 2022, its latest roadmap indicates a strategic recalibration. The originally planned 1.4nm process for 2027 has now been postponed to 2029, reflecting a shift away from aggressive node leadership toward process maturity and manufacturing stability.
Samsung is expected to provide further details of its foundry strategy centered on 2nm technology at its SAFE Forum scheduled for late May 2026. As customer demand becomes clearer, the company is prioritizing improvements in yield and production consistency for its 2nm platform. The goal is to strengthen its competitiveness through more commercially viable mass production capabilities rather than early node introduction alone.
As semiconductor scaling becomes increasingly complex and costly, the focus of competition in advanced process technology is shifting. In the past, leadership was defined by who first reached the most advanced node. Today, however, factors such as yield performance, process stability, and customer adoption speed are becoming equally, if not more, important.
The rapid expansion of AI chip demand has further transformed the requirements for foundry services. The industry is no longer defined solely by the ability to produce cutting-edge chips, but also by the capability to deliver them at scale with consistent quality, cost efficiency, and supply reliability.
Overall, TSMC and Samsung represent two distinct strategic directions in the advanced semiconductor race. TSMC continues to push the boundaries of process innovation and node advancement, while Samsung emphasizes manufacturing maturity and commercial readiness. The long-term outcome of this competition will likely depend on how effectively each company aligns its technology strategy with the evolving demands of the AI-driven semiconductor market, where performance, cost, and supply stability are all critical success factors.
