Kioxia-SanDisk Start BiCS10 NAND Sampling
According to a joint announcement released by Kioxia and SanDisk on July 3, the companies have officially begun engineering sample shipments of their jointly developed 10th-generation BiCS FLASH 3D NAND. The first product delivered to customers is a 1Tb TLC NAND flash memory chip built on a 332-layer architecture and manufactured exclusively at Kioxia's Fab2 facility in Kitakami, Iwate Prefecture, Japan.
The new BiCS10 generation continues to leverage two key technologies first introduced with 8th-generation BiCS FLASH: CMOS directly Bonded to Array (CBA) and Optimized Pitch Scaling (OPS). These technologies are designed to improve storage density, reliability, and power efficiency while enabling higher-layer 3D NAND stacking.
According to the companies, BiCS10 supports the Toggle DDR6.0 interface with transfer speeds of up to 4,800 MT/s. The new memory achieves a storage density exceeding 29 Gb/mm², representing a 59% increase compared with BiCS8. Power efficiency has also been significantly enhanced, including a 34% reduction in output power consumption, 30% improvement in read energy efficiency, 10% lower input power consumption, and 18% higher write energy efficiency. The device also supports Separate Command Address (SCA) and Power Isolated Low-Tapped Termination (PI-LTT) technologies, targeting AI data centers and enterprise-class high-performance SSD applications.
From a manufacturing perspective, the Fab2 facility in Kitakami serves as the advanced NAND flash production site jointly operated by Kioxia and SanDisk. The factory entered mass production in September 2025 and was specifically designed for manufacturing next-generation high-layer 3D NAND products. In addition to BiCS10, the production line also supports BiCS9 manufacturing.
The facility is equipped with advanced 300 mm wafer deposition, etching, and wafer bonding systems optimized for high-layer NAND production. It is also the only Kioxia manufacturing site capable of large-scale production of 332-layer BiCS FLASH using CBA dual-wafer bonding technology.
The CBA architecture, first commercialized with BiCS8, separates the fabrication of the memory array wafer and the CMOS logic wafer before bonding them together. This approach overcomes the routing limitations of conventional monolithic wafer designs and enables substantially higher stacking layers. Combined with OPS, which reduces cell pitch to increase storage density, the manufacturing platform has been carried forward into both BiCS9 and BiCS10, allowing the companies to introduce new generations without rebuilding production processes, thereby accelerating mass production readiness.
The announcement comes as demand for high-density enterprise storage continues to rise, fueled by AI foundation models, vector databases, and expanding AI infrastructure. The 3D NAND industry is rapidly transitioning toward 300-layer-plus architectures, with major memory manufacturers advancing next-generation flash technologies.
By delivering engineering samples of its 10th-generation 332-layer BiCS FLASH ahead of broader commercialization, Kioxia and SanDisk aim to validate high-density NAND solutions early and strengthen their position in the rapidly growing AI data center and enterprise SSD markets.
