TSMC to Ramp 2nm Chip Output to 60K/Month by 2026

According to Taiwan industry sources, TSMC has officially entered volume production at its first 2nm fab (P1) in Kaohsiung's Nanzih Science Park, with monthly output expected to reach 10,000 wafers.

Meanwhile, the second 2nm fab (P2) in Kaohsiung has started equipment installation and is on track for trial production by the end of this year. Insiders revealed that since the beam-raising ceremony held on March 31, the P2-A cleanroom and facility construction have progressed rapidly, allowing equipment move-in to begin. Trial runs are expected to start within 3–4 months, and the P2-B area is now preparing utilities. Combined, the P1 and P2 fabs are expected to support a monthly capacity of up to 30,000 wafers.

TSMC is also building a third site (P3), which will focus on the A16 variant of the 2nm node, with future P4 and P5 fabs in planning.

In addition to Kaohsiung, TSMC's Fab 20 in Hsinchu's Baoshan Science Park is also a major 2nm hub. The P1 section there has completed risk production and ramped to volume output. The P2 section is now fully equipped and will begin production soon. By the end of 2025, the two fabs are projected to achieve a combined monthly capacity of 30,000–35,000 wafers. P3 and P4 facilities there are expected to support the A14 process.

In total, TSMC currently has four 2nm fabs across Taiwan entering production or pre-production phases, with each cleanroom reportedly twice the size of those used by competitors. Supply chain estimates suggest the company's 2nm capacity will exceed 60,000 wafers per month in 2026.

According to official specs, TSMC's 2nm technology adopts a cutting-edge nanosheet architecture, a type of gate-all-around (GAA) transistor. Compared to 3nm, this enables 24% to 35% lower power consumption or 15% higher performance at the same voltage, with 1.15x higher transistor density.

Although yield rates for the 2nm node have not been officially disclosed, industry chatter suggests trial production yields may have reached 65%, ahead of competing nodes like Intel 18A and Samsung SF2. TSMC has only commented that yields have exceeded expectations.

Despite the technical complexity of 2nm production, TSMC is confident this node and the A16 process variant will be key enablers for the next generation of AI chips. The company plans to offer enhanced versions like N2P and A16 to serve both mobile and high-performance computing segments.

Early customer engagement is already strong — the number of early 2nm tape-outs reportedly surpasses those for 3nm and 5nm at comparable stages. TSMC expects 2nm to drive end products worth over $2.5 trillion globally within the next five years.

On the 3nm front, TSMC is in its third year of production, with N3E, N3P, and N3X variants available. Strong performance and yield improvements have made 3nm suitable even for automotive-grade chips, which have now started shipping. In Q2 2025, 3nm contributed 24% of TSMC's revenue, generating around NT$224 billion, and this figure is expected to keep rising in H2.

Looking ahead, the 2nm production ramp is projected to follow a trajectory similar to 3nm. Rumors suggest pricing for 2nm wafers may reach $30,000 per wafer — a 50% premium over 3nm — potentially boosting both TSMC's future revenue and profitability.