
According to market research firm Omdia, global NAND flash revenue is projected to grow from $65.6 billion in 2024 to $93.7 billion by 2029, with bit shipments expected to expand at an average annual rate of 17.7%. In this rapidly growing landscape, a breakthrough from Samsung Advanced Institute of Technology (SAIT) has attracted significant attention.
Samsung Electronics announced that a paper titled “Ferroelectric Transistors for Low-Power NAND Flash”, co-authored by 34 researchers from SAIT and its Semiconductor Research Lab, has been published in the prestigious journal Nature. The study reveals a key mechanism that combines ferroelectric materials with oxide semiconductors, potentially reducing the power consumption of existing NAND flash by up to 96%.
Traditional NAND flash stores data by injecting electrons into memory cells. As stacking layers increase, higher voltages are needed for signal transmission, driving up power consumption. Ferroelectric materials, however, can store information through spontaneous polarization without electron injection. Despite this advantage, balancing higher storage capacity with lower power has remained a major challenge.
By leveraging the low-leakage properties of oxide semiconductors alongside the polarization control effect of ferroelectric materials, researchers significantly lowered the voltage required for cell-string operation. Experiments demonstrated that this approach can maintain 5-bit-per-cell high capacity while cutting power consumption by as much as 96%, overcoming structural limitations of conventional NAND flash.
Once commercialized, this technology could dramatically enhance energy efficiency across large-scale AI data centers, mobile devices, and edge AI systems. It promises lower operating costs, extended battery life, and a critical path toward developing high-capacity, low-power solid-state drives (SSDs).